Organics
As the silicon chip industry moves into smaller and smaller feature sizes, it has been determined that the ILD must be low k. Most of the current crop of potential low k dielectrics are at least partially made up of organic material. In order to decrease the k value further, these materials are being made porous. Using CMP to planarize these organic, porous, low k materials has been described as similar to using sand paper on gelatin. The materials do not have sufficient mechanical strength to survive CMP polishing.
In addition, other integrated circuits, not made on silicon substrates, use similar organic materials for dielectrics. Compound semiconductors, made mostly from Gallium Arsenide and Indium Phosphide (GaAs and InP) substrates, commonly use BCB (benzocyclobutene, Dow Chemical) as a ILD. Even though they do not have extremely small features, mostly at 0.13 microns and larger, they have large topography due to high aspect ratios. Aspect ratios of GaAs chips can exceed 5:1 height to width. Since BCB is an organic dielectric, it is similar to low k dielectrics in that it is extremely difficult to planarize with CMP.
Other areas of IC chip manufacture that cannot use CMP include most back end processing. With the spread of flip-ship and wafer level packaging, the need for a more planar packaging layer has arisen. Again, the material of choice for passivation and packaging is BCB.
Currently, most organic material is planarized using excess material, followed by heating and reflow. Excess material can be either spun off, during reflow, or etched away. Etch back is the method of choice for planarization of larger features (0.5 microns and larger). Most GaAs processes apply six times the required amount of BCB, followed by reflow and etch back. This limits the number of metal gate layers for GaAs and other compound semiconductors to 1-2. CMP is also not suitable for GaAs since due to the high aspect ratios. The sheer forces applied during CMP are often too large for these features to withstand.
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